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Freescale Semiconductor /MKE06Z4 /PORT /PUE1

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Interpret as PUE1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)PTEPE0 0 (0)PTEPE1 0 (0)PTEPE2 0 (0)PTEPE3 0 (0)PTEPE4 0 (0)PTEPE5 0 (0)PTEPE6 0 (0)PTEPE7 0 (0)PTFPE0 0 (0)PTFPE1 0 (0)PTFPE2 0 (0)PTFPE3 0 (0)PTFPE4 0 (0)PTFPE5 0 (0)PTFPE6 0 (0)PTFPE7 0 (0)PTGPE0 0 (0)PTGPE1 0 (0)PTGPE2 0 (0)PTGPE3 0 (0)PTGPE4 0 (0)PTGPE5 0 (0)PTGPE6 0 (0)PTGPE7 0 (0)PTHPE0 0 (0)PTHPE1 0 (0)PTHPE2 0 (0)PTHPE3 0 (0)PTHPE4 0 (0)PTHPE5 0 (0)PTHPE6 0 (0)PTHPE7

PTFPE0=0, PTFPE7=0, PTFPE5=0, PTGPE5=0, PTGPE6=0, PTGPE2=0, PTHPE4=0, PTFPE2=0, PTHPE1=0, PTEPE7=0, PTGPE1=0, PTHPE2=0, PTGPE7=0, PTGPE3=0, PTEPE4=0, PTFPE3=0, PTEPE0=0, PTGPE4=0, PTHPE3=0, PTHPE0=0, PTEPE2=0, PTFPE6=0, PTEPE1=0, PTEPE6=0, PTFPE4=0, PTHPE5=0, PTHPE6=0, PTEPE5=0, PTHPE7=0, PTFPE1=0, PTEPE3=0, PTGPE0=0

Description

Port Pullup Enable Register 1

Fields

PTEPE0

Pull Enable for Port E Bit 0

0 (0): Pullup is disabled for port E bit 0.

1 (1): Pullup is enabled for port E bit 0.
PTEPE1

Pull Enable for Port E Bit 1

0 (0): Pullup is disabled for port E bit 1.

1 (1): Pullup is enabled for port E bit 1.
PTEPE2

Pull Enable for Port E Bit 2

0 (0): Pullup is disabled for port E bit 2.

1 (1): Pullup is enabled for port E bit 2.
PTEPE3

Pull Enable for Port E Bit 3

0 (0): Pullup is disabled for port E bit 3.

1 (1): Pullup is enabled for port E bit 3.
PTEPE4

Pull Enable for Port E Bit 4

0 (0): Pullup is disabled for port E bit 4.

1 (1): Pullup is enabled for port E bit 4.
PTEPE5

Pull Enable for Port E Bit 5

0 (0): Pullup is disabled for port E bit 5.

1 (1): Pullup is enabled for port E bit 5.
PTEPE6

Pull Enable for Port E Bit 6

0 (0): Pullup is disabled for port E bit 6.

1 (1): Pullup is enabled for port E bit 6.
PTEPE7

Pull Enable for Port E Bit 7

0 (0): Pullup is disabled for port E bit 7.

1 (1): Pullup is enabled for port E bit 7.
PTFPE0

Pull Enable for Port F Bit 0

0 (0): Pullup is disabled for port F bit 0.

1 (1): Pullup is enabled for port F bit 0.
PTFPE1

Pull Enable for Port F Bit 1

0 (0): Pullup is disabled for port F bit 1.

1 (1): Pullup is enabled for port F bit 1.
PTFPE2

Pull Enable for Port F Bit 2

0 (0): Pullup is disabled for port F bit 2.

1 (1): Pullup is enabled for port F bit 2.
PTFPE3

Pull Enable for Port F Bit 3

0 (0): Pullup is disabled for port F bit 3.

1 (1): Pullup is enabled for port F bit 3.
PTFPE4

Pull Enable for Port F Bit 4

0 (0): Pullup is disabled for port F bit 4.

1 (1): Pullup is enabled for port F bit 4.
PTFPE5

Pull Enable for Port F Bit 5

0 (0): Pullup is disabled for port F bit 5.

1 (1): Pullup is enabled for port F bit 5.
PTFPE6

Pull Enable for Port F Bit 6

0 (0): Pullup is disabled for port F bit 6.

1 (1): Pullup is enabled for port F bit 6.
PTFPE7

Pull Enable for Port F Bit 7

0 (0): Pullup is disabled for port F bit 7.

1 (1): Pullup is enabled for port F bit 7.
PTGPE0

Pull Enable for Port G Bit 0

0 (0): Pullup is disabled for port G bit 0.

1 (1): Pullup is enabled for port G bit 0.
PTGPE1

Pull Enable for Port G Bit 1

0 (0): Pullup is disabled for port G bit 1.

1 (1): Pullup is enabled for port G bit 1.
PTGPE2

Pull Enable for Port G Bit 2

0 (0): Pullup is disabled for port G bit 2.

1 (1): Pullup is enabled for port G bit 2.
PTGPE3

Pull Enable for Port G Bit 3

0 (0): Pullup is disabled for port G bit 3.

1 (1): Pullup is enabled for port G bit 3.
PTGPE4

Pull Enable for Port G Bit 4

0 (0): Pullup is disabled for port G bit 4.

1 (1): Pullup is enabled for port G bit 4.
PTGPE5

Pull Enable for Port G Bit 5

0 (0): Pullup is disabled for port G bit 5.

1 (1): Pullup is enabled for port G bit 5.
PTGPE6

Pull Enable for Port G Bit 6

0 (0): Pullup is disabled for port G bit 6.

1 (1): Pullup is enabled for port G bit 6.
PTGPE7

Pull Enable for Port G Bit 7

0 (0): Pullup is disabled for port G bit 7.

1 (1): Pullup is enabled for port G bit 7.
PTHPE0

Pull Enable for Port H Bit 0

0 (0): Pullup is disabled for port H bit 0.

1 (1): Pullup is enabled for port H bit 0.
PTHPE1

Pull Enable for Port H Bit 1

0 (0): Pullup is disabled for port H bit 1.

1 (1): Pullup is enabled for port H bit 1.
PTHPE2

Pull Enable for Port H Bit 2

0 (0): Pullup is disabled for port H bit 2.

1 (1): Pullup is enabled for port H bit 2.
PTHPE3

Pull Enable for Port H Bit 3

0 (0): Pullup is disabled for port H bit 3.

1 (1): Pullup is enabled for port H bit 3.
PTHPE4

Pull Enable for Port H Bit 4

0 (0): Pullup is disabled for port H bit 4.

1 (1): Pullup is enabled for port H bit 4.
PTHPE5

Pull Enable for Port H Bit 5

0 (0): Pullup is disabled for port H bit 5.

1 (1): Pullup is enabled for port H bit 5.
PTHPE6

Pull Enable for Port H Bit 6

0 (0): Pullup is disabled for port H bit 6.

1 (1): Pullup is enabled for port H bit 6.
PTHPE7

Pull Enable for Port H Bit 7

0 (0): Pullup is disabled for port H bit 7.

1 (1): Pullup is enabled for port H bit 7.

Links

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data